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Observer
Observer
6,988 Views
Registered: ‎03-20-2013

ARTIX-7: Power-On/Off Power Supply Sequencing for VCCADC / VREFP

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Hello,

according the Artix-7 data-sheet (DS181 (v1.6) April 17, 2013), chapter "Power-On/Off Power Supply Sequencing" on page 5 the sequencing for VCCINT, VCCBRAM, VCCAUX, and VCCO is defined.

What I'm missing is, the sequencing for VCCADC / VREFP? Is there any requirement for the sequencing for VCCADC / VREFP together with VCCINT, VCCBRAM, VCCAUX, and VCCO ?

Thanks

BR Bodo

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Observer
Observer
9,148 Views
Registered: ‎03-20-2013

>I assume by VREFP you really mean the VREFP and VREFN supply  pins of the XADC?

Yes, that's correct.

 

Thanks!

View solution in original post

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Scholar
Scholar
6,979 Views
Registered: ‎02-27-2008

Nope,


Any sequence is just fine for these.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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Observer
Observer
6,963 Views
Registered: ‎03-20-2013

Hello,

can I ground VCCADC and VREFP in case I do  not need the XADC?

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Xilinx Employee
Xilinx Employee
6,961 Views
Registered: ‎10-11-2007

The VCCADC pin should be tied to VCCAUX even if the XADC is not being used. The rest of the XADC pins can be tied to GND. I assume by VREFP you really mean the VREFP and VREFN supply  pins of the XADC?

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Observer
Observer
9,149 Views
Registered: ‎03-20-2013

>I assume by VREFP you really mean the VREFP and VREFN supply  pins of the XADC?

Yes, that's correct.

 

Thanks!

View solution in original post

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Visitor
Visitor
6,806 Views
Registered: ‎02-19-2013

Hi

Do we have a dedicated pin for Power on reset in Artix7?

Also do we need any monotonicity for the power supplies?

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Xilinx Employee
Xilinx Employee
6,801 Views
Registered: ‎10-11-2007

PROG_B is sort of a power-on reset. And yes, the supplies should rise monotonic. You don't want to have a dip around the POR thresholds for sure.

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