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Registered: ‎06-27-2019

Access VHDL signal with C++

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The exact task I am currently busy with is to create a clock in VHDL, which pulses at a fixed rate. The use of this is to read out the clock signal with C++ and use it for an existing programm.

The theory is easy:

1. Create clock in VHDL
2. Assign signal to pin.
3. Make C++ read out this signal.

But to what pin do I have to assign my signal and how do I read that out with C++? Has anybody experience with such a task?

I am using a TE0701-06CF carrier board with a TE0720 SoC.

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Scholar dpaul24
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Registered: ‎08-07-2014

Re: Access VHDL signal with C++

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@electronics_fan,

It is a very simple task.

You hardware design should have a register which must be addressable (some address decoder is need).

You C code should just access that location of the register to get its value.

As to how it is done, Google using something like "reading/writing a register in C".

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Scholar dpaul24
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Registered: ‎08-07-2014

Re: Access VHDL signal with C++

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@electronics_fan,

1. Create clock in VHDL
2. Assign signal to pin.

They are easily done.

 

But to what pin do I have to assign my signal and how do I read that out with C++? Has anybody experience with such a task?

Makes little sense to me!

What do you understand by a clock signal?

Electrically it is a volatge measured w.r.t ground that has a high and low value with fixed interval.

Now how is your C++ supposed to interact with that? What do you want to do actually?

C/C++ can read registers/flops (which store signal value/s) but cannot directly read signals.

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Registered: ‎06-27-2019

Re: Access VHDL signal with C++

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Thank you for you answer dpaul24.

Of course, you are right. I cannot access a signal. Probably I did not express my question the right way.

I meant to write into a register with VHDL and read out that specific value with C++. 

Has anyone experience in fulfilling such a task?

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Scholar dpaul24
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Registered: ‎08-07-2014

Re: Access VHDL signal with C++

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@electronics_fan,

It is a very simple task.

You hardware design should have a register which must be addressable (some address decoder is need).

You C code should just access that location of the register to get its value.

As to how it is done, Google using something like "reading/writing a register in C".

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Registered: ‎06-27-2019

Re: Access VHDL signal with C++

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Please excuse, if that´s a silly question, but actually I have no idea how to implement the adress decoder.

Could you give me a hint on how to do that?

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Registered: ‎07-23-2019

Re: Access VHDL signal with C++

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what is exactly "create a clock"? FPGAs don't create clocks (most of the times). They have external clock generators and, what they usually do, is to include an MMCM or PLL to generate the desired frequency.

I assume your board has an external clock somewhere and by "create a clock" you mean "have a specific clock signal with a given frequency". In that case, use the clock wizard.

to assign a pin to a signal, in this case, a clock, you will need to instantiate a clock buffer and place it with a constraint in the xdc file.

Now, the most cryptic to me... what do you understand by "reading a clock"? Maybe it's this old grumpy engineer, but in my opinion, clocks are not signals, so nothing to "read". Clocks just tell you when data is ready to be read, that's my take...

If you mean "detect a clock" and by that you mean telling whether that pin is alternating between 0 and 1, then you simply read the pin value a number of times and check if you have different values (a mix of 1's and 0's). Note that if your sampling frequency matches a submultiple of the clock frequency you could still be reading 1's or 0's all the time (A consequence of Nyquist sampling theorem)

 

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Scholar dpaul24
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Registered: ‎08-07-2014

Re: Access VHDL signal with C++

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@electronics_fan,

Please excuse, if that´s a silly question, but actually I have no idea how to implement the adress decoder.

Could you give me a hint on how to do that?

Would you  mind disclosing your knowledge of hardware logic design?

It is out of scope for this forum to discuss basic digital deisgn stuff. These things are taught at the undergraduate school level.

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Registered: ‎06-27-2019

Re: Access VHDL signal with C++

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@archangel-lightworks 
As I was trying to say, I basically want to create a periodically changing value of 1 or 0 and write it into a register, which is able to be read by C++.
Means VHDL writes periodically a 1 or 0 into a register and C++ reads it. So basically I try to get the hardware to talk to my software directly.
For sure, that´s not a real clock, but with the right intepretation it gets close to it.

@dpaul24 

I dont think, that memory-management in operating systems is a part of undergraduate school-level :p

I guess I will figure it out by myself. Thank you very much.

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Registered: ‎07-23-2019

Re: Access VHDL signal with C++

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@electronics_fan 

so, to "read" your clock, what you need is a processor. One way is to use the PS in your TE0720 and use any of the GPIOs (MIO I think they are called). you may need to short your clock output to your GPIO input. to be safe, better do it with a 1k resistor, any signal will be visible and the pins are protected in case you short two outputs.

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Registered: ‎06-27-2019

Re: Access VHDL signal with C++

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@archangel-lightworks 

I do have a clock on my TE0720 and a processor, so theoretically I should be able to work without GPIOs.

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Scholar dpaul24
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Registered: ‎08-07-2014

Re: Access VHDL signal with C++

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@electronics_fan,

I dont think, that memory-management in operating systems is a part of undergraduate school-level :p

I guess I will figure it out by myself. Thank you very much.

You are making things too complicated. There is no question of memory mgmt in OS in this discussion context. Therez no need of an OS for the stuff you want to do (accessing registers via C code). The binary file generated from your C code (which will run on a processor) can be coupled with your design (bitfile) and run on the FPGA directly to do simple stuff.

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Registered: ‎06-28-2019
Re: Access VHDL signal with C++

Please excuse, if that´s a silly question, but actually I have no idea how to implement the adress decoder.

Could you give me a hint on how to do that?

When someone ask me about address decoding, I would doubt....

Texas A&M Univ has in its lectures address decoding - research.cs.tamu.edu/prism/lectures/mbsd/mbsd_l16.pdf
You still didn't answer my question on your level of logic design knowledge, so that you can get better answers here.
 
PS - You are not reading tutorials, you are not Googling.The basic stuff you want to do are readily available on the net. Stick to one and implement it. If you have doubt there, come here and ask SPECIFIC questions.
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Registered: ‎07-23-2019

Re: Access VHDL signal with C++

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@electronics_fan 

GPIO (General Purpose Input/ Output) is what processors use to read/write at the lowest electrical level. Well, actually, everything has an electrical level at the bottom, the so-called physical layer. The difference between, say, a GPIO and a USB pin, is that you (the CPU, actually) cannot read the USB pin to check whether is 1 or 0. With the GPIO, that is possible. The reason is there is "something" (a number of OSI layers) in between a USB pin and the CPU but nothing in case of a GPIO.

So I wonder what is your plan to have a CPU read a pin that is not a GPIO. I would simply say is not possible.

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