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Explorer
Explorer
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Registered: ‎07-10-2008

Another question for XC7Z030 Configuration

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I have a clear idea that Kintex 7 inside XC7Z030 could be configured by PS side.

 

My question is : Can we leave signal PROG_B and INIT_B on FPGA configuration bank alone?

 

Many thanks for your answers.

 

David.

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Scholar
Scholar
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Registered: ‎06-05-2013

Re: Another question for XC7Z030 Configuration

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@hg81 You just have to connect pullups to these two pins (4.7K). For PROG_B recommend push-button to GND to enable manual configuration reset.

-Pratham

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Scholar
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Registered: ‎06-05-2013

Re: Another question for XC7Z030 Configuration

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@hg81 You just have to connect pullups to these two pins (4.7K). For PROG_B recommend push-button to GND to enable manual configuration reset.

-Pratham

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Community Manager
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Registered: ‎07-23-2012

Re: Another question for XC7Z030 Configuration

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You must not leave these pins floating. As pratham suggested, you have to pull-up these pins via a ≤ 4.7 kΩ resistor.

Please refer to Table 2-4 of http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf for more details.
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Scholar
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Registered: ‎11-09-2013

Re: Another question for XC7Z030 Configuration

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PROG_B button is in most cases useless, the function of PROG_B is software dependant, so asserting prog_b does not always cause the FPGA to be reconfigured.. so a button on PROG_B is potential confusion, as it may not always trigger reconfiguration as it is with normal FPGA's..

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Explorer
Explorer
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Registered: ‎07-10-2008

Re: Another question for XC7Z030 Configuration

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Great Answer.

 

Many Thanks.

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Explorer
Explorer
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Registered: ‎07-10-2008

Re: Another question for XC7Z030 Configuration

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Explorer
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Registered: ‎07-10-2008

Re: Another question for XC7Z030 Configuration

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Observer
Observer
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Registered: ‎06-07-2010

Re: Another question for XC7Z030 Configuration

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Is it safe to connect unused PROG_B with a stiff (<4.7k) pull-up in the 7-series?

 

I have got recent feedback from HW guys stating that the pin must be low-pulsed at power-up and they suggest a Schmitt-trigger circuit to generate a low-pulse of some unspecified duration only when the board starts up: they state that, if the pulse is not provided, there may be a risk of sporadic FPGA configuration failures.

I have experienced none of these (over a week of power-cycles) and I suspect the problem is down to the configuration settings of their specific test FPGA.

I reckon the PROG_B can be used by an external device if it wants to re-program the FPGA, but there is none in our application and it's absolutely safe to pull-up PROG_B if it's unused.

 

Am I right?

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Observer
Observer
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Registered: ‎06-07-2010

Re: Another question for XC7Z030 Configuration

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Just a clarification: our device is actually an Artix-7 FPGA (xc7a50t); but the same should apply to this too as well as to Zynq and SoC. If such a failure existed, it'd mean that the configuration logic can't be relied upon to load the FPGA at power-up.

I tend to think that the pulse on PROG_B just delays the configuration and masks a racing condition with the flash memory.

This can be handled by setting the options the bit-file generation script correctly.

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