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Visitor
Visitor
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Registered: ‎12-10-2019

Avnet Ultra96 not supported in Xilinx SDK

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Hi,

I want to run my first hello_world example on Avnet Ultra96 MPSoC ZU3EG A484, but the Hardware platform is not supported in Xilinx SDK 2018.3, what should I do in this case ?

achraf_0-1606839548252.png

 

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Voyager
Voyager
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Registered: ‎05-11-2015

 

You need to create that hw platform in Vivado and export it to SDK:

- open Vivado, create a hw project, configure it for the U96 board.

- drop the Zynq PS block, apply the board presets.

- if you are only developing sw, you don't need to add anything else, create a wrapper to the bd.

- run 'create bitstream'

- click export hardware, 'local' is fine.

- launch SDK from Vivado, it will pick up your exported hw and generate the hw platform

- Now start your sw

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Voyager
Voyager
281 Views
Registered: ‎05-11-2015

 

You need to create that hw platform in Vivado and export it to SDK:

- open Vivado, create a hw project, configure it for the U96 board.

- drop the Zynq PS block, apply the board presets.

- if you are only developing sw, you don't need to add anything else, create a wrapper to the bd.

- run 'create bitstream'

- click export hardware, 'local' is fine.

- launch SDK from Vivado, it will pick up your exported hw and generate the hw platform

- Now start your sw

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Visitor
Visitor
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Registered: ‎12-10-2019

Thanks,

Yes I am only writing SW, so only interested on the PS.

I created an RTL project (I am not whether it is the same as Hw project that you mentioned ) added the MpSoc using Vivado IP Integrator, and generate the bitstream, But I get some errors :

achraf_0-1606841489397.png

Is that what you meant ?, do you recommend any Link or tutorial?

 

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Voyager
Voyager
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Registered: ‎05-11-2015

 

Ah, ok, you need to do either:

- connect maxihpm0_lpd_aclk to pl_clk0, save and rebuild

- click on run block automation

- edit the PS (double click) and disable the AXI peripheral

1 or 2 are easier

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