Designing the FIFO buffers without using the CLBs and BRAMs?

[prabhuprasad1990]

Just curious to know whether it is possible to design the FIFO buffers without using the CLBs and BRAMs of the FPGA.

Thanks in advance,

Prabhu

[dpaul24]

@prabhuprasad1990,

If you remove BRAMs and CLBs, then what is left within an FPGA fabric?

Interconnect wires and I/O pads.

Do you think a FIFO can be implemented using the above two? :-)