If the signal is diff pair clock input tp HP bank, and external AC coupling (without external Bias), how should I select them?
As you say, Tables 1-55 and 1-56 in UG571(v1.12) indicate the needed settings. You should set DIFF_TERM=TRUE, DQS_BIAS=TRUE, and EQUALIZATION=EQ_LEVEL0~4. You cannot use EQUALIZATION=EQ_NONE when DQS_BIAS=TRUE. As shown in UG912(v2019.1), pages 207, 201, 188, you can set these properties by placing constraints like the following in the project .xdc file.