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Visitor daniel_leu
Visitor
5,440 Views
Registered: ‎08-05-2015

Error in protecte region blk_mem_gen_v8_2_vhsyn_rfs.vhd

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I created the IP Example Design for the AXI Memory Mapped to PCIe core and when I compiled it with Modelsim, I get following error:

 

 

-- Loading package STANDARD
** Error: ./sources_1/ip/axi_bram_ctrl_0/blk_mem_gen_v8_2/hdl/blk_mem_gen_v8_2_vhsyn_rfs.vhd(46)): in protected region.
** Error: ./sources_1/ip/axi_bram_ctrl_0/blk_mem_gen_v8_2/hdl/blk_mem_gen_v8_2_vhsyn_rfs.vhd(46)): in protected region.
** Error: ./sources_1/ip/axi_bram_ctrl_0/blk_mem_gen_v8_2/hdl/blk_mem_gen_v8_2_vhsyn_rfs.vhd(46)): in protected region.

 

I get the same error when using Aldec's RivieraPro. I tried this with Vivado 2015.1 and 2015.2. Is this a known issue?

 

Thank you!

 

--

Daniel

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Xilinx Employee
Xilinx Employee
9,713 Views
Registered: ‎09-20-2012

Re: Error in protecte region blk_mem_gen_v8_2_vhsyn_rfs.vhd

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Hi @daniel_leu

 

I doubt that you are not using the correct set of IP files for simulation.

 

Use below commands to generate scripts which can be used in modelsim.

 

set_property TARGET_SIMULATOR Modelsim [current_project]

launch_simulation -scripts_only -of_objects [get_files ip_name.xci]

 

or you can use the below command too

 

get_files -compile_order sources -used_in simulation -of_objects [get_files <ip_name>.xci]

 

Thanks,

Deepika.

Thanks,
Deepika.
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3 Replies
Xilinx Employee
Xilinx Employee
5,337 Views
Registered: ‎02-06-2013

Re: Error in protecte region blk_mem_gen_v8_2_vhsyn_rfs.vhd

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Hi

 

Which version of Modelsim are you using.

 

Have you compiled the libraries for this correctly and mapped in the ini file.

 

Is this an integrated example design simulation or genrating your own scripts.

 

If standalone flow you can use report_compile_order  at the vivado tcl console to get the list of files required for the simulation and their library association and check you scripst if all files and their mapping is correct. 

Regards,

Satish

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Xilinx Employee
Xilinx Employee
9,714 Views
Registered: ‎09-20-2012

Re: Error in protecte region blk_mem_gen_v8_2_vhsyn_rfs.vhd

Jump to solution

Hi @daniel_leu

 

I doubt that you are not using the correct set of IP files for simulation.

 

Use below commands to generate scripts which can be used in modelsim.

 

set_property TARGET_SIMULATOR Modelsim [current_project]

launch_simulation -scripts_only -of_objects [get_files ip_name.xci]

 

or you can use the below command too

 

get_files -compile_order sources -used_in simulation -of_objects [get_files <ip_name>.xci]

 

Thanks,

Deepika.

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)

View solution in original post

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Visitor daniel_leu
Visitor
5,298 Views
Registered: ‎08-05-2015

Re: Error in protecte region blk_mem_gen_v8_2_vhsyn_rfs.vhd

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Looks like the issue was the compilation order of files and since the VHDL file was protected, I didn't get a proper error message.... I got it solved when I used Vivado to create the compilation script. Thank you Deepika and Satish for your help!

 

Regards,

Daniel

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