External Single ended clock to VC707

[aslsfr]

Hi;

I need to connect an 250 Mhz Signal generator toVC707 and my UUT to syncronize the clocks. İs it possible to do this on VC707? The clock from Signal generator is single ended.  I'm new at Vivado. How can I also configure this on the VHDL side?

[markgraf]

You could use J31 USER_SMA_CLOCK_P. refer to UG885 page29-31

https://www.xilinx.com/support/documentation/boards_and_kits/vc707/ug885_VC707_Eval_Bd.pdf