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Visitor
Visitor
5,875 Views
Registered: ‎07-28-2014

GTP transceiver buffer bypass problem

Hello, I am using an Artix7 on the AC701 evaluation board and I have the following problem with the GTP transceiver buffer bypass or phase alignment:

 

When I enable buffer bypass in the transceiver wizard there is a periodic jitter on the recovered clock with 1,5MHz and its harmonics (see attached image). When I disable buffer bypass this problem does not occur.

 

I use just one receiver channel connected to the SFP transceiver of the AC701 board without decoding and comma alignment. The frequency of reference and recovered clock is 155,52MHz. There is no periodic jitter on the reference clock.

 

Does anyone have an idea how to fix that?

 

140805_135843_recclk_TIE_spec.png
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Xilinx Employee
Xilinx Employee
5,869 Views
Registered: ‎01-03-2008

The recovered clock output is not a very clean source due to the CDR function.  What is your concern?

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Visitor
Visitor
5,855 Views
Registered: ‎07-28-2014

I need the recovered clock to drive another transmitter's reference clock and for that it needs to have very low jitter. I also need fixed latency on the data thats why I use the buffer bypass.

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Moderator
Moderator
5,843 Views
Registered: ‎02-16-2010

You will need to use an external synthesizer to clean the jitter in RXRECCLK.
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