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shairva
Explorer
Explorer
963 Views
Registered: ‎09-19-2018

How do I add the IOB ?

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Hi all,

I've seen two different ways of adding IOB:

//synthesis attribute IOB of data_q is "TRUE"

And

reg data_q ;
(* IOB = "TRUE" *)

What are the differences between them?

Thanks in advance.

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jheslip
Xilinx Employee
Xilinx Employee
862 Views
Registered: ‎06-30-2010

we provide all of the syntax there for VHDL, Verilog and UCF

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syntax.JPG
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jheslip
Xilinx Employee
Xilinx Employee
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Registered: ‎06-30-2010
they do the same thing one is in your code so will be different between VHDL and Verilog the other is a synthesis constraint, you could also do a UCF constraint too.
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shairva
Explorer
Explorer
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Registered: ‎09-19-2018

could you show an example of that UCF constraint please?

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jheslip
Xilinx Employee
Xilinx Employee
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Registered: ‎06-30-2010
have a look at the constraints guide page 126: https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_5/cgd.pdf
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shairva
Explorer
Explorer
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Registered: ‎09-19-2018

I know that, but you don't place that constraint, (* IOB = "TRUE" *), in the UCF, you place it in the .v file

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jheslip
Xilinx Employee
Xilinx Employee
863 Views
Registered: ‎06-30-2010

we provide all of the syntax there for VHDL, Verilog and UCF

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syntax.JPG
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drjohnsmith
Teacher
Teacher
860 Views
Registered: ‎07-09-2009

Just to clarify

 

IOB = "TRUE"

 

does NOT add an IOB,

 

it tells the tools to 'try' to put the register into an IOB register,

   depending upon the tool as to how hard it tries ,

 

If this is what you mean then great,

 

If you want to get an IO pin, then thta goes in the UCF or XDC , depending upon your xilxin tool.

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