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Visitor
Visitor
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Registered: ‎12-03-2019

How to input analog siglnal into XADwizard with verilog simulation?

I want to simulate XADwizard I with verilog testbench in Vivado. I wrote as below for analog input sigmal to XADwizard terminal "Vp_Vn". But it didn't work. The analog signal seemed not to be input XADwizard. How should I input analog signal to the terminal "Vp_Vn"? ----------------------------------------------------------------------------------- real sin_out; parameter pi = 3.1415926535; parameter freq = 100e5; sin_out = $cos( 2 * pi * freq * t ) XADC_MODULE_wrapper DUT_1 (.sys_clock(CLK), .reset(RST), .Vp_Vn_0_v_n(1'b0), .Vp_Vn_0_v_p(sin_out), .do_out_0(OUT)); ---------------------------------------------------------------------------------------------------------------------------------------------------------------
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Moderator
Moderator
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Registered: ‎08-08-2017

Re: How to input analog siglnal into XADwizard with verilog simulation?

Hi @takimoto 

Use the Analog Stimulus file , this included  analog input values for simulation.

Please check the example test bench section in below user guide to create a analog stimulus file  page 88

https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf

The wizard have provision to add stimulus file.Capture.PNG

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Visitor
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Registered: ‎12-03-2019

Re: How to input analog siglnal into XADwizard with verilog simulation?

Hi  pthakare

Thank you for advicing kindly.

I tried to Analog stimulus file for analog signals to  terminals "VP" "VP" at XADC wizard.

I made  a file design.csv and wrote testbench as attached. But it did not work. The analog signals were not be input to the module terminals. "VP" "VN" terminal signal at XADC wizard became High impedance(Z).

What is wrong? Would you give some more advice? 

 

 

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Visitor
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Registered: ‎12-03-2019

Re: How to input analog siglnal into XADwizard with verilog simulation?

Hi  pthakare

I could not attached design.csv. So I attach again.

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Moderator
Moderator
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Registered: ‎08-08-2017

Re: How to input analog siglnal into XADwizard with verilog simulation?

Hi @takimoto 

Is it feasible to share me your project archive ? I will send you the FTP link to attach the same.

Additionally for the refference , with the same IP configuration , generate the example design (Right click to Ip-> open example design) and check the testbench to see what you are missing 

or 

Simulate the example deisgn in UG480 and then make the changes for VP/VN

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Visitor
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Registered: ‎12-03-2019

Re: How to input analog siglnal into XADwizard with verilog simulation?

Hi pthakare,

Than you for replay.

Please check the attached archive. This is the project I want to work.

I reffered the example design generated from XADC IP configuration, but still I have not be able to find the solution.

I'm glad for your help.

 

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Moderator
Moderator
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Registered: ‎08-08-2017

Re: How to input analog siglnal into XADwizard with verilog simulation?

Hi @takimoto 

Thanks for sharing the project , I will check this at my end and get back to you shortly

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