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Visitor
Visitor
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Registered: ‎09-25-2018

How to set the SLEWRATE of FPGA?

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How to set the  SLEWRATE of FPGA in constraint file(for example, virtex 7)? 

Thanks

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Moderator
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1,127 Views
Registered: ‎09-15-2016

Re: How to set the SLEWRATE of FPGA?

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Hi @dabangking

 

You can set Slew rate attributes ‘ FAST’ and ‘SLOW’ in xdc as below.

set_property SLEW FAST|SLOW [get_ports port_name]

 

Refer UG471 for more info.

Regards
Rohit
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Moderator
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1,128 Views
Registered: ‎09-15-2016

Re: How to set the SLEWRATE of FPGA?

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Hi @dabangking

 

You can set Slew rate attributes ‘ FAST’ and ‘SLOW’ in xdc as below.

set_property SLEW FAST|SLOW [get_ports port_name]

 

Refer UG471 for more info.

Regards
Rohit
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Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
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Visitor
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Registered: ‎10-31-2016

Re: How to set the SLEWRATE of FPGA?

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Unfortunately UG471 isn't much help to anybody using Vivado. It gives slew rate examples for ISE UCF files while ignoring XDC syntax.

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