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Observer
Observer
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Registered: ‎12-04-2019

Initialize BRAM in VHDL

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Hello everyone. 

I 've been working on my diploma thesis and I use vhdl for my code. I work with images and until now I was storing the images' pixels into arrays. I was reading a txt file with a function in order to store my pixels into the array. However, my professor told me that this couldn 't be synthesized and I have to change it because it's only for simulation. Is this true?
He proposed me to use BRAM for storing the pixels. However, I have some questions here. First of all, can i use the Block Generator of Vivado and load a .coe file with the pixels instead of initializing the BRAM with INIT_xx? I 'm asking for .coe file because this is a file too and I want to know whether it can be synthesized. And if I can use this file, do you know if Notepad ++ supports this file extension?

Thanks in advance!

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Moderator
Moderator
166 Views
Registered: ‎08-08-2017

Hi @mary_pant 

Use the Block memory generator IP available under IP catalog.

The Block Memory Generator core uses embedded Block Memory primitives in Xilinx FPGAs to extend the functionality and capability of a single primitive to memories of
arbitrary widths and depths.

see the page 85 of below product guide

https://www.xilinx.com/support/documentation/ip_documentation/blk_mem_gen/v8_4/pg058-blk-mem-gen.pdf

Yes radix 10 should also work , if not you can simply convert it to Hex (radix 16).

using the code template is bit tedious as you have to manually set the attributes and need to do the cascading if your width and depth does not accommodate in single primitive

 

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3 Replies
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Moderator
Moderator
204 Views
Registered: ‎08-08-2017

Hi @mary_pant 

#1 Yes , it will not synthesize.

#2 .COE file assignments in Block memory generator will do the job here. A COE file can define the initial contents of each individual
memory location . You can initialize the memory using .coe and check the INIT_XX cell properties after synthesis /implementation , you will observed that memory is initialized.

.COE can be opened and edited in notepad++

Here is the reference to create .coe file.

https://www.xilinx.com/support/documentation/sw_manuals/xilinx11/cgn_r_coe_file_syntax.htm

******************************************************************
********  Example of Single Port Block Memory .COE file  *********
******************************************************************
; Sample memory initialization file for Single Port Block Memory, 
; v3.0 or later.
;
; This .COE file specifies initialization values for a block 
; memory of depth=16, and width=8. In this case, values are 
; specified in hexadecimal format.
memory_initialization_radix=16;
memory_initialization_vector=
ff,
ab,
f0,
11,
11,
00,
01,
aa,
bb,
cc,
dd,
ef,
ee,
ff,
00,
ff;

 

-------------------------------------------------------------------------------------------------------------------------------
Reply if you have any queries, give kudos and accept as solution
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Highlighted
Observer
Observer
171 Views
Registered: ‎12-04-2019

@pthakare  thanks a lot for your answer! So there is no problem with synthesis when I use the .coe file. I prefer to use this as the INIT properties are not so clear for me. So as I have seen at the code template for instantiating a BRAM I leave the INIT properties filled with zeros, and I just give the name of my .coe file in the INIT_FILE property. Am I right? 
Regarding to the memory_initialization _radix can I use 10 if I have decimal numbers in my file?

Thanks again for the answer, you helped me a lot!

 

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Highlighted
Moderator
Moderator
167 Views
Registered: ‎08-08-2017

Hi @mary_pant 

Use the Block memory generator IP available under IP catalog.

The Block Memory Generator core uses embedded Block Memory primitives in Xilinx FPGAs to extend the functionality and capability of a single primitive to memories of
arbitrary widths and depths.

see the page 85 of below product guide

https://www.xilinx.com/support/documentation/ip_documentation/blk_mem_gen/v8_4/pg058-blk-mem-gen.pdf

Yes radix 10 should also work , if not you can simply convert it to Hex (radix 16).

using the code template is bit tedious as you have to manually set the attributes and need to do the cascading if your width and depth does not accommodate in single primitive

 

-------------------------------------------------------------------------------------------------------------------------------
Reply if you have any queries, give kudos and accept as solution
-------------------------------------------------------------------------------------------------------------------------------

View solution in original post