07-16-2014 01:11 AM
Hello,
I have a design that needs to read/write data to a RAM from a JTAG connection.Before starting to write my own VHDL controller, I was wondering: are there any Xilinx primitives that allow JTAG-accessible RAMs ?
Best regards,
Michele
07-16-2014 02:33 AM
Hi Michele,
You can try to use the VIO core in chipscope and try to write the BRAM contents.
http://www.xilinx.com/products/intellectual-property/chipscope_vio.htm
Hope this helps.
--Krishna
07-16-2014 07:13 AM
The PicoBlaze (kcpsm6/kcpsm3) JTAG bootloader also does this (writes -> BRAM port via JTAG operations).
See the documentation for the full details.
http://www.xilinx.com/products/ipcenter/picoblaze.htm
[download link on left side]
http://forums.xilinx.com/t5/PicoBlaze/Release-7-of-KCPSM6-What-s-New/m-p/363487
http://forums.xilinx.com/xlnx/board/message?board.id=PicoBlaze&thread.id=40 (PicoBlaze FAQ)
Cheers,
bt