05-12-2016 12:13 PM
I have Xilinx KC705 board and i want to transmit data from PC to FPGA with thorughput above 10 MB/s. For this purposes i use Gigabit Ethernet and AXI Ethrenet Subsytem IP.
So, I have a few questions.
1. Should i make TCP/IP protocol? Or i can use Ethernet frames?
2. Should i use DMA Controller with DRAM or i can receive packet directly to my next block of my application?
3. What packet parser will be better? VHDL-based or Microblaze-based.
05-12-2016 12:18 PM - edited 05-12-2016 12:22 PM
implement the simplest possible system to make it work which in my opinion is a MB + AXI-Ethernet + lwIP and do your parsing on MB. Once you have that functional, if performance is not good enough, you can think of optimizing the pieces but not before then.
You can check out this xapp: http://www.xilinx.com/support/documentation/application_notes/xapp1026.pdf
05-16-2016 08:08 AM
So, it works. I achieved speed 415 Mbits/s, that's enough for my apllication. Thank you.
And now i have another question.
I can transmit some data from PC to KC705 board. As i understand this data is written in DDR3 memory. How i can get this data from memory and send it to my next FPGA block with speed 80Mbits/s???
05-16-2016 08:20 AM