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Observer
Observer
7,921 Views
Registered: ‎07-20-2015

KC705 Ethernet

Hi.

I have Xilinx KC705 board and i want to transmit data from PC to FPGA with thorughput above 10 MB/s. For this purposes i use Gigabit Ethernet and AXI Ethrenet Subsytem IP.

So, I have a few questions.

1. Should i make TCP/IP protocol? Or i can use Ethernet frames?

2. Should i use DMA Controller with DRAM or i can receive packet directly to my next block of my application?

3. What packet parser will be better? VHDL-based or Microblaze-based.

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Teacher
Teacher
7,914 Views
Registered: ‎03-31-2012

implement the simplest possible system to make it work which in my opinion is a MB + AXI-Ethernet + lwIP and do your parsing on MB. Once you have that functional, if performance is not good enough, you can think of optimizing the pieces but not before then.

 

You can check out this xapp: http://www.xilinx.com/support/documentation/application_notes/xapp1026.pdf

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Observer
Observer
7,739 Views
Registered: ‎07-20-2015

So, it works. I achieved speed 415 Mbits/s, that's enough for my apllication. Thank you.

 

And now i have another question.

 

I can transmit some data from PC to KC705 board. As i understand this data is written in DDR3 memory. How i can get this data from memory and send it to my next FPGA block with speed 80Mbits/s???

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Teacher
Teacher
7,734 Views
Registered: ‎03-31-2012

80 Mb/s is slow enough that you can directly write to your IP connected to a m_axi_gp port from the cpu. Basically a memcpy or a loop with *ip = *ddr_addr++; type copy depending on how you connect the ip to axi.
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Observer
Observer
7,695 Views
Registered: ‎07-20-2015

Do you have some example?

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