Showing results for 
Show  only  | Search instead for 
Did you mean: 
Registered: ‎02-24-2015

Kintex 7 digital input electrical characteristics

Hello forum members,

I'm working on a project involving a Kintex 7 chip, namely XC7K160T-2FFG676. We want to set up several digital input pins of the chip to monitor voltages on the board. It's a custom made board. Our current idea is to use resistor dividers to bring the voltages down to the FPGA io voltage level, with two dividers per measured voltage. Under the normal circumstances, one of the dividers will output voltage just above logical 0, so that it registers as 1, but if the measured voltage fluctuates down a certain amount, then this will be seen as 0 by the chip. The other divider doing the oposite. I'm trying to find documentation on the IO banks, so we can choose values of the resistors, but all I can find is this document,

which doesn't answer all of my questions.

I'd like to know:

  1. What voltage levels correspond to which IO standards?
  2. What are the maximum logical 0 and minimum 1 voltages?
  3. What are the effective resistanses of the IO banks' transistors? Can I neglect them if I use 1 or 2 kOhm resistors in the dividers?
  4. What minimum current do I need to allow to flow through the dividers, so that chip inputs get enough current?

The voltages we need to monitor are on-board voltages supplied to the chip, with values 1.2, 1.5, 1.8, 2.5, 3.3 volts. There is no problem, of course, to lower the 1.5 V and above to 1.2 V, if we can use IO banks fed by that voltage, but what about the 1.2 V? Are there any banks which can be supplied with smaller reference voltage?


By the way, I know about the XADC, but we need to see fluctuations in the voltages of interest on 10 ns time scale.



Tags (3)
0 Kudos
1 Reply