Kintex 7

[mubasheerahmed_12]

Hi.

I am trying to create a symbol of kintex7 xc7k160ffg676 package symbol with the help of orcad schematic capture. I downloaded the package file of the following package IC but I feel it's difficult to align rows and columns from that HTML text to excel to assign each and every single pin naming in ocrad capture. So is there any other convenient way to do this cause I feel here are many who are experienced and they knows well about this but for me it's kinda new thing..

Thank you at the earliest.

[johnhandwork]

@mubasheerahmed_12

Convenient, no.

I found I was able to copy from the text pin file for the package available from Xilinx and paste in blocks in the symbol editor.  There's a little manipulation required in the excel spreadsheet imported from the text file but once you get the method down to what the Orcad Symbol editor needs for an array of pins, it becomes a pretty clean process.

I haven't found any automated way but the part creation took me under an hour when I got the Cadence down.  When it's cut & past for pin names and pin numbers, it's hard to come up with a way that any pin on the part could be wrong.

- John

[mubasheerahmed_12]

True.

It's very hard to cut and paste and make order wise all the pin numbers and names and relevant banks to do this in Excel spreadsheet..it was good if we had an automated way to create this part..

I thought may be some experienced person here who had encountered and come up with a convenient way to do this..

But thanks and happy to know that you're doing the same way.

Thank you.

[drjohnsmith]

its a continue pain that these chips do not have "standard" cad files .

Instead there must be thousands of people around the world that have made symbols all very similar.

You would think that with some chips costing USD 50K, that there would be sufficient profits to allocate some one to generate some standard CAD packages .

there are companies like this
https://www.ultralibrarian.com/
that seem to take the data sheet and make symbols, but they are not very good for FPGAs , especially large ones,