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Visitor ajivs
Visitor
412 Views
Registered: ‎10-03-2018

Kintex7-DDR3 & NOR inteface- Schematic Review

Please help to verify the attached schematics of Kintex7 with DDR3 & NOR Flash
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Xilinx Employee
Xilinx Employee
369 Views
Registered: ‎03-14-2016

Re: Kintex7-DDR3 & NOR inteface- Schematic Review

Hello,

Overall, your schematic looks good.  There are a couple things to note.

The DDR3_CLK_P/N pair does not require a resistor near the FPGA (R348).  If you do want to have that on the board, I suggest adding Do Not Stuff.

On the configuration QSPI (U13), the Reset# signal has two pull ups to Vcc_1V8.  Please see R318 and R108.  

Everything else looks good.

Thank you,
Sam