UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Visitor maxbaker
Visitor
3,623 Views
Registered: ‎02-06-2014

Kintex7 - DSP Setup Time between instances

I have a timing failure when moving from Vivado 2014.4 to 2015.2 on a Kintex7 device.  I am using the exact same input files (rtl, tcl, xdc, etc), and only changing version of Vivado between runs.  The speed file is the same too, according the the timing reports.

 

I have root caused it to a major difference in setup time on the DSP48E1.

 

Vivado 2014.4:

 DSP48_X3Y18          DSP48E1 (Setup_dsp48e1_CLK_A[17]) 
   -1.634    10.457    my_reg

Vivado 2015.2:

DSP48_X3Y20          DSP48E1 (Setup_dsp48e1_CLK_A[17])
-3.154     8.670    my_reg

The only differences I can tell are A. The Instance (X3Y18 vs X3Y20) and B. the Vivado version.  Either way, I fail timing as a result of the massive difference in setup time for that pin.

 

Questions for Xilinx:

1. Is this a real physical difference between X3Y18 and X3Y20?

2. How do I make Vivado 2015.2 behave and choose an instance that has better timing, a la 2014.4?

 

Hand instanantiating and LOC'ing the DSP is not an option for this RTL.

 

Thanks,

-m

 

 

0 Kudos
2 Replies
Voyager
Voyager
3,614 Views
Registered: ‎04-21-2014

Re: Kintex7 - DSP Setup Time between instances

 


@maxbaker wrote:

I am using the exact same input files (rtl, tcl, xdc, etc), and only changing version of Vivado between runs. 

 

 


Is it posible your synthesis and implementation settings are different?

***Many of us who help you are just FPGA enthusiasts, and not Xilinx employees. If you receive help, and give kudos (star), you're likely to continue receiving help in the future. If you get a solution, please mark it as a solution.***
0 Kudos
Xilinx Employee
Xilinx Employee
3,592 Views
Registered: ‎08-02-2011

Re: Kintex7 - DSP Setup Time between instances

Can you post the entire snippet of the timing reports for the failing path?
www.xilinx.com
0 Kudos