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vza11033
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Newbie
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Registered: ‎09-05-2016

Kintex7 LVDS input common mode voltage

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In application note XAPP894 P11,
I found that the common mode voltage of LVDS receiver in FPGA can drop to 100mV.

Can I use this function on Kintex7 ?

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gnarahar
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Registered: ‎07-23-2015

@vza11033 Yes, it can drop to 100mV provided you use external termination resistors. This is done to have the Common mode in range of DPHY SLVS standard

- Giri
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Don’t forget to reply, kudo, and accept as solution.
If starting with Versal take a look at our Versal Design Process Hub and our Versal Blogs
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kkn
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Registered: ‎01-15-2008
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gnarahar
Moderator
Moderator
8,177 Views
Registered: ‎07-23-2015

@vza11033 Yes, it can drop to 100mV provided you use external termination resistors. This is done to have the Common mode in range of DPHY SLVS standard

- Giri
------------------------------------------------------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
If starting with Versal take a look at our Versal Design Process Hub and our Versal Blogs
------------------------------------------------------------------------------------------------------------------------

View solution in original post