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Observer
Observer
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Registered: ‎12-20-2018

LVCMOS18_XX IO Standards and usage

Hi,

In Virtex-7 FPGA I am evaluating using a 312.5M (3.2 ns) output through LVCMOS18 IO to an external PHY board. While looking through the datasheet for switching characteristics I see the following different standards within LVCMOS18. What do they mean? And how do I know which one is used/ how to force one of the standards?

 

LVCMOS18 - different typesLVCMOS18 - different types

set_property IOSTANDARD LVCMOS18 [get_ports {us_TxData[0]}] is the constrain I use. The FPGA I am evaluating is: xc7v585tffg1761-2

 

Please can someone help with this as soon as possible as I am trying to meet a deadline.

 

Thank you very much!

Sundar

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Moderator
Moderator
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Registered: ‎08-08-2017

Re: LVCMOS18_XX IO Standards and usage

Hi @sundarbas 

It specifies the Slew rate and drive strength. Please check the below section in 7 series selectIO user guide  

https://www.xilinx.com/support/documentation/user_guides/ug471_7Series_SelectIO.pdf

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