03-05-2018 08:10 PM - edited 03-05-2018 08:11 PM
I'm trying to get ANY signal on the HDMI output in J2. I use the code below, but cannot see anything when scoping (it's all 0v).
Below is my module and ucf:
module YE_spartan6_v002( //--General input CLK_IN1, //--ASK output oASKp, output oASKn ); OBUFDS OBUFDS_inst ( .O(oASKp), // 1-bit output: Diff_p output (connect directly to top-level port) .OB(oASKn), // 1-bit output: Diff_n output (connect directly to top-level port) .I(1) // 1-bit input: Buffer input ); endmodule
# CLK NET "CLK_IN1" LOC = L15; # ASK # PlanAhead Generated IO constraints NET "oASKp" IOSTANDARD = LVDS_25; # PlanAhead Generated physical constraints NET "oASKp" LOC = C7; NET "oASKn" LOC = A7;
Am I doing something wrong?
03-08-2018 04:14 AM
As the input to the OBUFDS is 1 I'm wondering if ISE has removed it?
If you look in FPGA Editor is the OBUFDS still there?
What else is in the bank with the oASKp/n pins? Are they behaving as expected?
03-14-2018 05:39 AM