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Visitor
640 Views
Registered: ‎10-12-2018

## Logical operation problem

Hi All!

I'm new in vhdl programming. I just started tutorial trainings and got some problem.

I'm using ISE 14.7 version. Development board Waveshare DVK601, Core3S250E.
It was programmed simple AND logical operation between two inputs.

For example y<=i0 and i1; Simulation has done and worked how should be.

After flashing the Core, it works like OR logical operation. Then I tested back and found that OR operation works like AND operation.

Did anybody had such a problem? Maybe I missed something?

1 Solution

Accepted Solutions
Scholar
610 Views
Registered: ‎04-26-2015

## Re: Logical operation problem

I would guess that your inputs and outputs are inverted.

For inputs this is achieved by having switches that float high, but pressing the switch pulls them down to ground. Pressing the switch gets a zero, releasing it gets a one.

For outputs, it's because the LED anode is connected to 3.3V through a resistor and the LED cathode is connected to the FPGA pin. Setting the pin to 1 (3.3V) means there's no voltage across the LED and therefore no light; setting the pin to 0 (0V) means that the LED turns on.

Inverting all inputs and the output of an OR gate turns it into an AND gate, and vice versa.

2 Replies
Scholar
611 Views
Registered: ‎04-26-2015

## Re: Logical operation problem

I would guess that your inputs and outputs are inverted.

For inputs this is achieved by having switches that float high, but pressing the switch pulls them down to ground. Pressing the switch gets a zero, releasing it gets a one.

For outputs, it's because the LED anode is connected to 3.3V through a resistor and the LED cathode is connected to the FPGA pin. Setting the pin to 1 (3.3V) means there's no voltage across the LED and therefore no light; setting the pin to 0 (0V) means that the LED turns on.

Inverting all inputs and the output of an OR gate turns it into an AND gate, and vice versa.

Visitor
581 Views
Registered: ‎10-12-2018