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Newbie kjs_tek
Newbie
3,702 Views
Registered: ‎04-02-2014

MGT Power Sequence and Delay

I'm working on a design with an Artix 200. I'm trying to minimize the board space required by the overall design and would like some information regarding power sequencing of the  GTPs.

 

In order to minimize the number of power supplies on my board, I need to power MGTAVCC and VCCINT from the same supply (no problem here) and can have them first in the sequence. I then need to bring up a some other rails in two more stages before getting to the 1.2V supply connected to MGTAVTT. This will cause a delay of 30 to 45 ms between VCCINT/MGTAVCC reaching an operational level and MGTAVTT reaching an operational level.

I don't see any maximum time where VCCINT/MGTAVCC can be powered while MGTAVTT is unpowered. Please confirm that this delay will not cause any problems. (Also, if there is a max time allowed for this state, please indicate what it is.)

 

Thanks for your help.

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3 Replies
Adventurer
Adventurer
3,691 Views
Registered: ‎02-16-2014

Re: MGT Power Sequence and Delay

My QQ is:634227759,Can we have a discuss?
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Xilinx Employee
Xilinx Employee
3,673 Views
Registered: ‎01-03-2008

Re: MGT Power Sequence and Delay

> I need to power MGTAVCC and VCCINT from the same supply.

 

This would be a bad decision as it will very likely result in higher jitter and bit errors.

 

> Please confirm that this delay will not cause any problems

 

As you have found there is no maximum time specified for this condition and the sequencing recommendations is MGTAVCC followed by MGTAVTT which your system will do.  All of the power supplies should be within 90% of the nominal voltage before configuration starts to ensure correct programming and initialization of the device.  If this is met there shouldn't be any issues.

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Xilinx Employee
Xilinx Employee
3,671 Views
Registered: ‎08-01-2012

Re: MGT Power Sequence and Delay

We do not recommend to combine VCCINT and/MGTAVCC even if they are same voltage levels. The MGTAVCC is very sensitive to noise and analog supply. If we combine then the samll switching noise in VCCINT cuses errors in MGT operations.

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