12-02-2019 09:38 AM - edited 12-02-2019 11:31 AM
I am instantiating an MMCM/PLL and I am trying to figure out the ideal VCO operating so I can calculate the M, D, and O to generate a desired output frequncy (I am using only one clock_out port).
For the zynq-7020 with speed grade -1C: MMCM_FVCOMIN = 600 MHz, MMCM_FVCOMAX = 1200 MHz, PLL_FVCOMIN = 800 MHz, PLL_FVCOMAX = 1600 MHz
How is the ideal operating of the frequency of the VCO determined? Looking at the clocking wizard, the clock wizard reports a different VCO frequency depending on the desired output frequency.
12-02-2019 11:13 AM
12-02-2019 11:55 AM
Oh no. Not trying to out do the wizard.
My team is trying to parameterize Xilinx's MMCM and PLL with generics, so I need to set up my own M, N and O. I read in UG472 that "The starting M value is first determined. This is based off the VCO target frequency, the ideal operating frequency of the VCO." So I was wondering what the ideal VCO operating frequency was/if it was published.
Good to know. Thanks.
12-02-2019 01:57 PM
"The starting M value is first determined. This is based off the VCO target frequency, the ideal operating frequency of the VCO."
Your quote comes from pg 77 of UG472(v1.14), where it also says, “The goal is to make D and M values as small as possible while keeping ƒVCO as high as possible.”
So, the ideal operating frequency for the VCO is fVCOMAX.
As mentioned by drjohnsmith and by pg248 of UG949, setting the VCO frequency as high as possible “generates less clock uncertainty due to reduced jitter and phase error”.
However, other restrictions that we place on MMCM operation will usually cause fVCO to be less than fVCOMAX. -as you will find when working with the MMCM equations in chapter 3 of UG472.
12-02-2019 06:56 PM