06-25-2018 07:37 AM
What is maximal current consumption on Zynq-7000 rails beyond which one can suspect a latch-up is about to start.
06-25-2018 07:46 PM
06-27-2018 01:51 PM
Couple things here. First if you are interested in latchup test data see our reliability report document UG116. Second, the FPGA pins have clamp diodes so as long as you design by table 1 of the data sheet they should not get damaged. There are auxiliary requirements such as the 10mA per pin and 200mA per IO bank which should be designed to as well. For max current device can handle you can fiddle with XPE until a rail become red that should be a goo indication that you are at that device supply's max load.
07-04-2018 12:04 AM
For the moment our design isn't ready yet, so it's difficult to estimate resources and clocking.
Can I find somewhere some reference designs for Zynq-7000 or Kintex and import them to XPE ?
07-04-2018 12:12 AM
The results from UG116 are based on test procedure from JESD78D.
The test conditions in JESD78D are completely different from our test case, where latch-up is likely provoked by irradiation.