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Visitor
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Registered: ‎01-16-2019

NAND Flash

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Hi 

We have used NAND flash with 4K page size (from Micron) for configuring the Zynq 7000 series FPGA and when we checked the checklist we found that the page size has to be between 512 & 2048. Please suggest can we flash the boot image to 4K NAND flash using any methods.

NAND flash Part number:- MT29F8G08ABBCAH4-IT:C

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Registered: ‎01-22-2015

Re: NAND Flash

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@swaroop525

Welcome to the Xilinx Forum!

I am sorry to say that Xilinx has not approved the use of flash, MT29F8G08ABBCAH4, for the Zynq-7000.

Please select a flash part from the approved list shown in Table C-9 of Xilinx document UG908.

Cheers,
Mark

 

 

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Registered: ‎01-22-2015

Re: NAND Flash

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@swaroop525

Welcome to the Xilinx Forum!

I am sorry to say that Xilinx has not approved the use of flash, MT29F8G08ABBCAH4, for the Zynq-7000.

Please select a flash part from the approved list shown in Table C-9 of Xilinx document UG908.

Cheers,
Mark

 

 

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Scholar
Scholar
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Registered: ‎12-07-2018

Re: NAND Flash

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Hello, quick question for you. Did you connect the Flash to the PS or PL side? It PL what IP did you use?

 

Thank you,

Joe

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Registered: ‎01-22-2015

Re: NAND Flash

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@joe306 

When NAND-flash is used to configure the Zynq-7000, there are dedicated connections between the flash and the FPGA (see section 6.3.5 in UG585(v1.12.2)).  Also, when NAND-flash is used to configure the Zynq-7000, it is Vivado that writes the configuration file to NAND-flash.

Table 49 of the current UG908(v2019.2) still does not list the specific NAND flash, MT29F8G08ABBCAH4, as approved for use with the Zynq-7000.  However, AR#50991 says that the similar NAND flash,  MT29F8G08AxxDxxx, is “Known to Work” for the Zynq-7000, but is apparently not officially supported by Xilinx.

Why do you ask about IP for writing to NAND flash?  Are you using NAND flash for something else besides FPGA configuration?

Cheers,
Mark

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Scholar
Scholar
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Registered: ‎12-07-2018

Re: NAND Flash

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Hello, I have connected two NAND Flash devices to my custom board for data storage. The memory is connected to the PL-side. I was hoping to find an IP instead of having to write verilog code.

Thank you,

Joe

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Registered: ‎01-22-2015

Re: NAND Flash

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@joe306 

Often, you can save a lot of time by using Xilinx IP instead of writing your own Verilog.  

However, for communicating with flash memory (either NOR or NAND), I think you will probably save time, avoid confusion, and make your code more portable by writing your own Verilog.   I can see in another post that you have been struggling with the AXI Quad SPI IP.  So, perhaps you are inclined to agree with my advice.

The thing is, getting the hardware details figured out is a small part of the work.  After that, you still need to dig into the flash datasheet to learn about the command details for read, write, erase, etc.

In the following posts, I helped someone who was writing their own HDL for an SPI interface with flash.  Reading these posts will give you and idea of what’s involved and help you decide if writing your own Verilog is worth the effort.

https://forums.xilinx.com/t5/FPGA-Configuration/Qspi-flash-memory/m-p/1058871#M15397

https://forums.xilinx.com/t5/FPGA-Configuration/Qspi-Flash-memory/m-p/1060556

Good luck,
Mark

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Scholar
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Registered: ‎12-07-2018

Re: NAND Flash

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Hello and thanks for responding to my post and also for the links. I will definitely look into writing verilog. The thing that I don't know how to do is how to implement the AXI interface in the code to interface with the PS-Side of the Zynq Ultrascale+ MPSoC. I am totally new to the world of Xilinx. If you have any references on including AXI in custom verilog code please let me know.

 

Respectfully,

Joe

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