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Observer tollinjose
Observer
949 Views
Registered: ‎07-18-2017

P side of MRCC

I want to connect single ended clock to a MRCC pin in XC7v200T. Where to check a particular pin is positive or negative?

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3 Replies
Moderator
Moderator
941 Views
Registered: ‎04-18-2011

Re: P side of MRCC

Hi @tollinjose

 

The naming convention on the pins should tell you. 

It follows this pattern

IO_LXXY_ZZZ_#

 

IO indicates it is a user IO

L tells you it is part of a pair. 

XX will be a number to indicate which pair in the bank it is. 

Y will indicate either P or N side of the pair. 

ZZZ is usually for some special function 

# tells you the bank number.

 

For example:

 

IO_L13P_T2_MRCC_34

is a user IO that is the part of the 13th pair in bank it is also in memory byte group 2, and it is a multi region CCIO. 

The number indicates it is located in bank 34. 

 

You could also open the IO pin planning view post synthesis and lock the single ended clock to the P-side of any MRCC clock pair in the desired bank

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Observer tollinjose
Observer
937 Views
Registered: ‎07-18-2017

Re: P side of MRCC

Thank you @klumsde for quick response. But I am not familiar with this naming. What i know is some thing like v42 or b32. Is there a document to correlate same ?

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Moderator
Moderator
925 Views
Registered: ‎04-18-2011

Re: P side of MRCC

there is a packaging and pinout guide. 

http://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf

 

you can use table 2-4 to download the ASCII pinout file. 

 

for example

https://www.xilinx.com/support/packagefiles/v7packages/xc7v2000tflg1925pkg.txt

 

2000t_pinout.PNG

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