02-03-2015 12:46 AM
1) I would like to reconfig CMTs through DRP port, by using C code running on Microblaze.
2) There is XAPP888 which describes the DRP access procedure and has a reference design which is based on state machine, and which contains a verilog header file with all the calculation/lookup functions, of course written in verilog.
3) The Microblaze in my design is connected to the DRP port of the CMT through AXI4-to-DRP bridge (custom code which is verified to work correctly), there is something similar in XAPP1214, but there is no code in C).
4) My problem is now translating verilog to C (which is problematic as I am not proficient in both of them), and I would like to know if there is already code in C for that, perhaps in some peripheral's driver.
5) The device in question is Kintex-7, 325T on a custom board. The environment is Planahead 14.3.
Thanks in advance.
02-03-2015 12:49 AM
Sorry, forgot to mention:
I've implemented XAPP888 previously with PLLE2, but only as a state machine which was configuring a setting out of a table of around 10 settings. Now I need to reconfigure some arbitrary frequency and not a preset one.
06-09-2015 10:26 AM
I'll second this request. Now that Xilinx has released an AXI<->DRP bridge it would profoundly useful if some sample C code were made available to demonstrate reconfiguring an MMCM using parameters much like those used for input to the MMCM configuration Wizard. I'm using a Kintex-7.
I've googled like crazy, but I simply can't find straightforward documentation that tells me how to perform DRP reconfiguration of an MMCM (short of running a Verilog sim from Jim Tatsukawa's app note).
06-22-2015 11:23 PM
...and it would help if there were proper DRP timing details instead of "see XAPP888 code" - I dare say I could decode the verilog into vhdl given time and avoiding the project manager's "hows it going?" - answer "I'm just learning Verilog for the next couple of days!"
If someone knows where proper documentation resides could they let us know. Many thanks!
06-23-2015 10:39 AM
I've finally got MMCM DRP working from my Microblaze (Kintex-7) for my extremely simple requirements (two MMCM configurations with 3 outputs, with all outputs phase locked, and a different CLKIN1 frequency for each configuration). Here's what I did:
06-23-2015 07:06 PM
06-29-2015 05:05 PM
The AXILite-DRP bridge doesn't appear in the stock Vivado IP catalog (at least for 2014.4), it has been released as sample IP with an application note:
I had to copy the IP into a local directory and add a user IP path to my project.
09-08-2015 02:20 AM
Check the section "Dynamic Reconfiguration through AXI4-Lite" in the following guide: http://www.xilinx.com/support/documentation/ip_documentation/clk_wiz/v5_1/pg065-clk-wiz.pdf