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Visitor
Visitor
1,012 Views
Registered: ‎10-17-2018

PS_MIO SPI pull-ups

Hi,

 

I am using a XCZ7030-SBG485 device and I have using some of the PS_MIO pins on bank 501 for SPI communication. I have a Xilinx Schematic review recommendations excel file that recommends to connect pull-up resistors on the SPI0 and SPI1 pins, near the SPI device.

 

Are these pull-ups really needed for the SPI interface ? Please advise.

Thank you

 

Zynq_SPI_pull-ups.jpg
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Xilinx Employee
Xilinx Employee
977 Views
Registered: ‎03-14-2016

Hello,

I have confirmed that the guidance in the XMP277 Schematic checklist is what we recommend for SPI.  I have submitted a Change Request to add the pull-up recommendations to the Zynq 7000 PCB Design Guide (UG933).

Thank you