I am using a XCZ7030-SBG485 device and I have using some of the PS_MIO pins on bank 501 for SPI communication. I have a Xilinx Schematic review recommendations excel file that recommends to connect pull-up resistors on the SPI0 and SPI1 pins, near the SPI device.
Are these pull-ups really needed for the SPI interface ? Please advise.
I have confirmed that the guidance in the XMP277 Schematic checklist is what we recommend for SPI. I have submitted a Change Request to add the pull-up recommendations to the Zynq 7000 PCB Design Guide (UG933).