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Visitor
Visitor
342 Views
Registered: ‎01-08-2020

Package trace delay information for XC7V415TFFG1158

Hi,

Hoping that I've posted on the proper board...

I am a PCB designer using a vendor's part that is based on XC7V415TFFG1158. There are several high speed interfaces on this device, most, but not all of which are GTX transceiver-based. I am trying to find the package trace delay information for the pins related to these interfaces.

I have (hopefully) looked through the documentation and answer records for quite a while, but have not been able to find out how to do this, short of using write_csv in Vivado. I have Vivado installed, but I don't have a license for this particular part, so cannot obtain the information that way.

Please assist in getting me this information.

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Xilinx Employee
Xilinx Employee
240 Views
Registered: ‎03-07-2018

Hi @hansonquan3d 

You can get this details from Vivado.

Please check https://www.xilinx.com/support/answers/55697.html for more details.

 

Regards,
Bhushan

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Visitor
Visitor
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Registered: ‎01-08-2020

Hello Bhusan,

Unfortunately I am not licensed in Vivado for that part. Therefore I cannot extract that information.

The delay information should be the same for any given part, regardless of a design's implementation. Why would it need to be generated?

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Moderator
Moderator
204 Views
Registered: ‎09-18-2014


@hansonquan3d wrote:

Hello Bhusan,

Unfortunately I am not licensed in Vivado for that part. Therefore I cannot extract that information.

The delay information should be the same for any given part, regardless of a design's implementation. Why would it need to be generated?


You are correct about that for your specific part however Xilinx offers a multitude of parts. There are multiple die densities with multiple package type and size options. It is much easier to generate these with software that already contain the data. If you'd like PM me your email and I can send you a copy that I can generate from Vivado otherwise you are more than free to estimate/calculate the delay using the IBIS pin RLC data but I highly doubt you'd like doing that for 1xxx pins which is another reason why it's much more simpler to just generate it. 

 

Regards,

TC

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