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Contributor
Contributor
146 Views
Registered: ‎04-19-2016

Per bit deskew max speed

I'm designing a system with a per-bit deskew receiver on HR IOs, along the lines of the ones described in XAPP1017 / XAPP585. It's basically a Zynq 7014S talking to a Spartan 7 over some differential pairs. As far as I know, you can't meaningfully time dynamic receivers or the corresponding transmitters with set_input_delay or set_output_delay so how do I know how fast it ought to work and what speed grade I need? I've seen the spreadsheet attached to XAPP585, is it basically OK as long as I have a valid window in that sheet? Doesn't speed grade come into it? I know there's a difference in max BUFIO frequency, but otherwise the spreadsheet is independent of speed grade. How does this all relate to the maximum DDR LVDS tx / rx speed quoted in the datasheet (950Mb/s for Artix -1) or XAPP585 PDF (1200Mb/s for Artix -1)?

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Moderator
Moderator
123 Views
Registered: ‎04-18-2011

Re: Per bit deskew max speed

Hi @patstew

You are really bound by the clocking scheme and (at higher rates) to a certain extent the capability to implement a per bit deskew which the xapp should mange for you.

So if the speed grade impacts the fmax of the clocking then this impacts the performance you get.

 

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