08-21-2019 08:07 PM
When powering Zynq 7000 SoC (Z-7045), if the the power on/off sequencing of PS and PL sections are being followed as given in DS191, can we begin the powering on the rails of PL and PS section at the same time? Or, is there any need to power up one section (PL or PS) completely before powering up the other one?
Same doubt while powering down.
08-21-2019 11:49 PM
Thanks for the reply. Sharing of power rails was one of the reasons I had in mind. The other reason was to accomodate PMIC supplies. However, the EVM (ZC-706) separates the PL and PS power supplies.
08-22-2019 08:51 AM
Can any Xilinx employee verify this:
- a PL voltage rail and a PS voltage rail can be fed through a same power-ground power bus?