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Explorer
Explorer
771 Views
Registered: ‎11-03-2013

SDI TX TIMING JITTER

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Hello,

 

I'm using the SDI (TX only) reference design for Artix7 FPGA.

I get a correct image on my SDI monitor but when checking the SDI connection I see that we have a significant "timing jitter (10Hz)".

What could cause this jitter, as all other test are OK (higher frequency jitters)?

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Explorer
Explorer
561 Views
Registered: ‎11-03-2013

Re: SDI TX TIMING JITTER

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Hi all,

 

After a lot of tests it looks like the issue is with the external 148.5Mhz oscillator.

Using a more accurate oscillator (lower ppm) resolved this issue.

3 Replies
Scholar drjohnsmith
Scholar
747 Views
Registered: ‎07-09-2009

Re: SDI TX TIMING JITTER

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Have look at 

 

correct quality clock component on the MGT's,

distortion on the clock (s)

Distortion / pickup due to tracking on the signal

power supply noise , especially on the MGTs 

bad quality / wrong value of serial pass capacitor ( 4u7 ? ) 

Do you trust the test equipment ?

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
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711 Views
Registered: ‎09-17-2018

Re: SDI TX TIMING JITTER

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Low frequency jitter,

 

At and below 10 Hz, is usually called wander (for historical reasons).  Wander being a low frequency distortion of the clock edges from a theoretical perfect occurrence of their rising edges, is usually caused by something else (other than what was already mentioned).  These are:  temperature, power supply instability (unstable power supply feedback loop), some other activity in your design at 10 Hz (in your case) coupling to what you are trying to measure.

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Explorer
Explorer
562 Views
Registered: ‎11-03-2013

Re: SDI TX TIMING JITTER

Jump to solution

Hi all,

 

After a lot of tests it looks like the issue is with the external 148.5Mhz oscillator.

Using a more accurate oscillator (lower ppm) resolved this issue.