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Visitor
Visitor
430 Views
Registered: ‎08-07-2019

SPI CLOCK FROM FPGA NOT FROM SPI MASTER

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Hello all, 

 

I have an artix-7 FPGA connected to MASTER SPI (FX3). First, when I try to configure FPGA I fail. I check SPI_SCK or CCLK during operation and wierd thing is there. 

 

When I power on the board I see FPGA send a ~2.5 MHz clock into CCLK!!!!! PICTURE BELOW:

SSS.png

When I start sending bitstream through SPI i see two clock added!! picture below

 

SSS2.png

Any one know what is going on?

 

Thanks,

Https://nhz.us

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Teacher
Teacher
358 Views
Registered: ‎07-09-2009

what configuration mode do yo have the fpga set into ?

it looks like its configured to be master, which is why its sending out the cclk.

You dont say your board or FPAG , bu there ar enormal three mode pins to the FPGA M0, M1 M2 which sleect what the FPGA does upon a prog_b going down,

 

https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf

 

https://www.xilinx.com/support/answers/34904.html

 

 

 

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Xilinx Employee
Xilinx Employee
366 Views
Registered: ‎08-25-2010

Hi @nhzgroup 

What's the frequency of these two? It looks as if there is a crosstalk.

Thanks
Simon
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Highlighted
Teacher
Teacher
359 Views
Registered: ‎07-09-2009

what configuration mode do yo have the fpga set into ?

it looks like its configured to be master, which is why its sending out the cclk.

You dont say your board or FPAG , bu there ar enormal three mode pins to the FPGA M0, M1 M2 which sleect what the FPGA does upon a prog_b going down,

 

https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf

 

https://www.xilinx.com/support/answers/34904.html

 

 

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>

View solution in original post

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Visitor
Visitor
343 Views
Registered: ‎08-07-2019
 
Thanks 
 
drjohnsmith, You were right! the problem solved ! got stuck with this for many days! god bless you. Best, 
 
 
 
 
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