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Contributor
Contributor
618 Views
Registered: ‎07-05-2017

Shifting of fixed generated pattern in real time application

I am generating the continuous fixed pattern of 10 millisecond with help of ROM and counter. Counter is running at clock of 1 MHz for 10 millisecond and it is count limited. After every 10 millisecond the same pattern is repeated. I am implementing it on Artix 7 FPGA. On checking the output on Oscilloscope I am seeing that pattern is shifted about 15 ns after each 10 ms cycle and it keeps on shifting. My system clock is of 10 MHz. Only ROM and counter are present in the design. Can anyone tell me why the pattern is shifting in the real time application.   

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2 Replies
606 Views
Registered: ‎06-21-2017

Re: Shifting of fixed generated pattern in real time application

15 nS in 10 mS is 1.5 parts per million.  You might be seeing the frequency uncertainty in your oscillator.  Can you get your scope and FPGA to run from the same time base?

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Contributor
Contributor
555 Views
Registered: ‎07-05-2017

Re: Shifting of fixed generated pattern in real time application

I have also compared my generated pattern with the reference 10 ms pattern on ILA and it is also showing that my pattern is shifting continuously w.r.t reference pattern.

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