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Contributor
Contributor
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Registered: ‎08-13-2017

Simulation of xapp524 for 2-wire 16bit (bit mode) LSB_First

Hello everyone,

 I am trying to simulate the xapp 524 code for 2 wire LSB First16 bit (bit mode), I tried to generate exact similar pattern as given in datasheet as shown below:Datasheet_pattern.JPG

 

Simulated_results.JPG

 Below simulated image is the zoomed part around the yellow marker of same simulation above .

Zooomed Simulation.JPG

(2 wire ,16 bit, lsb first ,bit mode)

-- when frame_clk is '1' then port_1 (as per data sheet out1) and port _2 (as per data sheet out2) ,resembles the output  as per datasheet dataout1 is  "FFFCFFFC "  which is correct when frame_pattern is 1111 and 0000 but when bitslip_P signal pulse comes then the frame pattern changes to bfbf and 4040 then the output changes to 3FF33ff3 and C00CC00C which is not correct.

Please suggest me correction, thanks in advance.

 

 

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Contributor
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Registered: ‎10-03-2016

Hi,

 Try with the following AdcFrame.vhd file. their end of the file some changes occurs. Please look on it.

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Contributor
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Registered: ‎08-13-2017

@subashrajam

 I tried your file , it gives me same result in simulation.

what extra changes should i do in Frame Clock code to get result.

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Contributor
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Registered: ‎10-03-2016

Hi,

 when i was simulating the design with 2wire, it works with the given Adcframe.vhd file. But for 1 wire, it is not working.

 

Thanks,

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