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ajcrm125
Adventurer
Adventurer
1,196 Views
Registered: ‎06-04-2010

Slice LUT explosion between synth and Elab

Working on an Artix 7a50t design and synthesis shows the following utilization:

 

+----------------------------+------+-------+-----------+-------+
| Site Type | Used | Fixed | Available | Util% |
+----------------------------+------+-------+-----------+-------+
| Slice LUTs* | 7987 | 0 | 32600 | 24.50 |
| LUT as Logic | 7955 | 0 | 32600 | 24.40 |
| LUT as Memory | 32 | 0 | 9600 | 0.33 |
| LUT as Distributed RAM | 32 | 0 | | |
| LUT as Shift Register | 0 | 0 | | |
| Slice Registers | 3026 | 0 | 65200 | 4.64 |
| Register as Flip Flop | 3025 | 0 | 65200 | 4.64 |
| Register as Latch | 1 | 0 | 65200 | <0.01 |
| F7 Muxes | 201 | 0 | 16300 | 1.23 |
| F8 Muxes | 5 | 0 | 8150 | 0.06 |
+----------------------------+------+-------+-----------+-------+

 

Hey not to bad...

 

But then when I kick off elab I get his:

ERROR: [Place 30-640] Place Check : This design requires more Slice LUTs cells than are available in the target device. This design requires 52180 of such cell types but only 32600 compatible sites are available in the target device. 
ERROR: [Place 30-640] Place Check : This design requires more LUT as Memory cells than are available in the target device. This design requires 35224 of such cell types but only 9600 compatible sites are available in the target device.
ERROR: [Place 30-640] Place Check : This design requires more LUT as Distributed RAM cells than are available in the target device. This design requires 35224 of such cell types but only 9600 compatible sites are available in the target device.
ERROR: [Place 30-640] Place Check : This design requires more RAMD64E cells than are available in the target device. This design requires 35200 of such cell types but only 9600 compatible sites are available in the target device. 

 

Why such a huge difference?  I would love to see where the resources are getting used up but the elab report doesn't indicate where the resources are getting used... just that I ran out.

 

Anything I can check?

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2 Replies
ajcrm125
Adventurer
Adventurer
1,192 Views
Registered: ‎06-04-2010

You know what.... I think I fired off the distributed memory generator as opposed to the Block memory generator.  Which means al my memories are Slice based.  That'll eat up some resources! :)

 

Let me swap that and report back.

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avrumw
Expert
Expert
1,191 Views
Registered: ‎01-23-2009

First, I don't know what "elab" is - that is not a process in either ISE or Vivado (and you don't tell us which tool you are using).

 

It is also not clear where the report you are showing comes from. For at least some part of the synthesis process, the IP used in the design are "black boxes" and hence do not count toward the utilization. By the time you get to placement, though, those black boxes are filled in (so maybe a lot of your utilization is in the IP).

 

If you really don't know where the resources are going, you could try (temporarily) switching to a larger device. The Artix-7 200T might be large enough, and would allow you to stay in the same device, but if not, you could select a much larger Kintex-7 or Virtex-7 device - this would allow the placer to finish, and then you could look at the reports.

 

Avrum

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