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Contributor
Contributor
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Registered: ‎04-02-2013

Spartan-7 Clamp Diode Conducted Voltage and Max Current Details

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According to table 2 in DS189 we can sink 10mA through the ESD clamp diode on each input continuously as long as the 200 mA total per bank is not exceeded. In our use case, we will be pumping 50 to 100uA (13.8V with a 175k series resistor) through the diode on multiple (6 or 7) inputs most of the time. During fault conditions, we will be pumping closer to 200uA on a single input for hours at a time (32V with a 175k resistor in series).  Is that an issue?

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Moderator
Moderator
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Registered: ‎04-18-2011

Sorry to be blunt but this is a recipe for disaster.

You can't drop 14 volts across a series resistor and apply it to the pin. 

You are going to damage the input by applying an excessive voltage to it. 

The VIn spec must be respected. The max input voltage is reccommended to be VCCO +200mV. The absolute max spec is a little higher but no where near what you are proposing. 

The diode is there to protect the input from ESD. So it is not meant to be conducting at all under normal circumstances. We probably won't characterise the diode being on constantly. 

 

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Moderator
Moderator
535 Views
Registered: ‎04-18-2011

Sorry to be blunt but this is a recipe for disaster.

You can't drop 14 volts across a series resistor and apply it to the pin. 

You are going to damage the input by applying an excessive voltage to it. 

The VIn spec must be respected. The max input voltage is reccommended to be VCCO +200mV. The absolute max spec is a little higher but no where near what you are proposing. 

The diode is there to protect the input from ESD. So it is not meant to be conducting at all under normal circumstances. We probably won't characterise the diode being on constantly. 

 

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Don’t forget to reply, kudo, and accept as solution.
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View solution in original post

Contributor
Contributor
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Registered: ‎04-02-2013

Thanks for clearing this up for us.

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Visitor
Visitor
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Registered: ‎06-28-2018

> You can't drop 14 volts across a series resistor and apply it to the pin. 

Why not ?

I am reading DS182 (Kintex-7 FPGAs Data Sheet)

If I have a series resistor divider with 67kOhm connected to 14 volts, 10kOhm connected to GND, then the resulting voltage at the middle of the divider would be 1.8V.

I for sure are allowed to connect this middle of the divider to an 1.8V I/O of the FPGA.

Now if I JUST use a 67kOhm series resistance (so basically leaving out the 10kOhm resistor to GND), the only difference is, that now around 200uA of current will be conducted through the clamp diode of the I/O of the FPGA (lets just say the whole FPGA is unpowered).

DS189 says under *RECOMMENDED* operating conditions:  "Maximum current through any pin in a powered or unpowered bank when forward biasing the clamp diode." == 10mA

> We probably won't characterise the diode being on constantly. 

Then what exactly does the above entry from DS189 say ? As far as I can tell you are contradicting the data sheet. This sentence from the data sheet DOES characterise that exactly.

It seems you are also contradicting  AR# 37347

> The VIn spec must be respected.

Well that's real basic Ohm's law: If there is a current of 200uA through the 67kOhm resistance, then the voltage drop over this resistance is 13.4 Volt.

So at the point this resistance is connected to the FPGA the Voltage would be 0.6V; meaning you WOULD meet the VIn spec.

> Sorry to be blunt but this is a recipe for disaster.

Could you elaborate why this should be the case ?

> You can't drop 14 volts across a series resistor and apply it to the pin.

Of course you can; provided a current is conducted through the resistor. That's exactly what you would do with a voltage divider.

Could you elaborate why this exactly should be a problem ?

Is there another constraint NOT written in the data sheet which we do no know about ?

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