Since you are having Quartus issues, I can't give detailed answers, but I have a couple points. You should be writing one process state machines. The case statement and output assignements should be in the registered process. This helps to avoid latches and makes it a lot easier to get your process sensitivity list correct. Have you simulated? Provided your sensitivity list is correct, simulation can help to debug problems.
Why are you asking questions about Quartus on a Xilinx board?
