Suggestions please on switching clock frequency

[davewarren]

Hi,

I am using the Zynq 7015 device and Vivado  2017.4. What I would like to do is switch between two fixed clock frequencies, 120Mhz or 150Mhz, while configured.

Currently I have a MCM configured with the wizard that has 100Mhz input and generates 120Mhz. I understand that I can enable an AXI-lite interface to make it programmable but that will use a lot of resource. Also could enable the DRP interface to change the MCM settings.

But can I just generate 120Mhz and 150Mhz then switch between using a second MCM with two input clocks and a bit to select which is in use. Would the second MCM be able to lock on either frequency?

[andrewlan · Accepted solution]

Generate both clocks using an MMCM and then feed these 2 clocks into a BUFGMUX primitive where you select which clock feeds your logic. 

[dgisselq]

@davewarren,

What you are asking to do is neither easy nor simple to do.  There are a lot of pitfalls along the way.  The most common would be glitches in the select line that controls the clock switch, causing clock glitches that are then sent to your logic, causing some positive edge logic to be triggered but not other logic, etc.  It gets to be a real mess.

The solution is the BUFGMUX--where Xilinx has done all the hard work for you.

If you want to read more about how such a mux might be implemented under the hood, feel free to check out this article.

Dan

[davewarren]

Thanks for the suggestions guys, I will give it a go

[markg@prosensing.com]

@davewarren 

Special timing constraints will be needed for the BUFGMUX as described by Avrum in <this> thread.  These special constraints (Exclusive Clock Groups) are also described on page 43 of UG903(v2019.1).

Mark