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285 Views
Registered: ‎02-26-2019

The minimum number of clocks to drive 10 PLLs using xc7k410tffg900

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Hi.I am using xc7k410tffg900 FPGA. According to the document, xc7k410tffg900 FPGA has 10 PLLs. Now I have to use all 10 PLLs at the same time, I wonder how many clks should I use at least to drive the 10 PLLs.

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Scholar drjohnsmith
Scholar
274 Views
Registered: ‎07-09-2009

Re: The minimum number of clocks to drive 10 PLLs using xc7k410tffg900

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It depends upon your circuit in the fpga.
You need to do a basic design in the fpga to see what clocks you need to use,
<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
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Scholar drjohnsmith
Scholar
275 Views
Registered: ‎07-09-2009

Re: The minimum number of clocks to drive 10 PLLs using xc7k410tffg900

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It depends upon your circuit in the fpga.
You need to do a basic design in the fpga to see what clocks you need to use,
<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
Explorer
Explorer
245 Views
Registered: ‎04-06-2017

Re: The minimum number of clocks to drive 10 PLLs using xc7k410tffg900

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If my pcb has not been designed, what is the minimum number of oscillaters should I place in the pcb?

 How many clk_in should I used to drive all the 10 PLLs in k7 410T FFG900 ?

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Scholar drjohnsmith
Scholar
112 Views
Registered: ‎07-09-2009

Re: The minimum number of clocks to drive 10 PLLs using xc7k410tffg900

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Suggest you dont add to a closed forum post, as its unlikely to get many looks.

In this case the answer is the same as above,

    do a dumy design,

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
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106 Views
Registered: ‎02-26-2019

Re: The minimum number of clocks to drive 10 PLLs using xc7k410tffg900

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Thanks
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