We are implementing a standard type of video sensor-like LVDS clock/data type interface as described in many app-notes.
The device we are targetting is a Kintex Ultrascale. I notice that in the SelectIO datasheet that the ISERDES/IDELAY architecture is a different that the 7 series (i.e ISERDES3, BITSLIP components)
A few questions :
When will the HDL libraries guide come out for ultrascale devices. Is there a pre-release?
Can we reuse the series-7 clock/data alignment methodologies outlined in XAPP like XAPP585
Unfortunatly there is no answer until yet, so I gonna push this thread.
My company is also interested in designing deserializer structures with ultrascale series. Are there some news about?