10-08-2018 12:10 AM
We have the VC707 Dev kit . We are trying to run RTL created by SiFive SDK for U500 vc707 platform. The build commands for the "verilog" and "Memory configuration file (.mcs)" are as follows
$ make -f Makefile.u500vc707devkit verilog // for verilog extraction
$ make -f Makefile.u500vc707devkit mcs // .mcs file for that can be programmed onto an VC707 FPGA board.
we are able to run verilog target successfully but unable to run mcs target of the make file.
We found that "mcs" target of make file requires "xc7vx485tffg1761-2" part number support in vivado.
Currently we are using 2016.4 Vivado Design Suite HLx (as suggested by u500 SDK) On Linux. We have downloaded it from the following link.
The "mcs" target fails with an error message saying that "Unknown part number "xc7vx485tffg1761-2" "
Kindly help us in solving the issue
Thanks & regards.
10-08-2018 12:21 AM
If you downloaded the WebEdition (free) , it doesn't support any Virtex-7 chip. You get what you pay for. Otherwise, it could be that device needs a later release of Vivado
10-08-2018 10:30 PM
Thank you for the reply. Actually It has been mentioned that any version above 2016.4 are known to fail. As I'm new to Vivado , not sure which version(and or packages) has to be installed to solve the problem. Could you kindly help me to find appropriate Vivado version/packages which contains the mentioned part number.
ps: This is the link we are following which mentions that 2016.4 is supported version.