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Adventurer
Adventurer
2,153 Views
Registered: ‎03-23-2015

Using MGTREFCLK as sysclk for MIG

Hi,

  Setup: XC7Z035 -2L FBG676I

  Vivado 2016.2

  MIG v4.0 configured for DDR3 at bank 33, 34 (HP banks at right column)

 

  I would like to use MGTREFCLK at bank 112 (also on right column) as 200MHz clk input to MIG sys clk.  Is MGTREFCLK considered "same column" for sys clk input as required by MIG user guide?

 Capture.PNG

Regards,

 

Neo

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Xilinx Employee
Xilinx Employee
2,144 Views
Registered: ‎02-06-2013

Re: Using MGTREFCLK as sysclk for MIG

Hi

 

No the system clock to the MIG should be provided by CCIO pin and an internal clock source from the MGT reference clock is not recommended.

Regards,

Satish

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