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x1991
Newbie
Newbie
4,605 Views
Registered: ‎02-17-2015

Virtex 7 GTX Transceivers

Hello,

 

I have a problem with my GTX Transceiver on virtex 7. I use the example design of the ipcore. When i test the design in

chipscope it works fine but sometimes the receiver resets themselves. I don't know why??

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venkata
Moderator
Moderator
4,595 Views
Registered: ‎02-16-2010

How is track_data_out signal is behaving?
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yenigal
Xilinx Employee
Xilinx Employee
4,586 Views
Registered: ‎02-06-2013

Hi

 

 

Does the clocks and reset inputs to the core clean and stable?

 

Can you attach the captures showing the issue.

Regards,

Satish

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umamahe
Xilinx Employee
Xilinx Employee
4,584 Views
Registered: ‎08-01-2012

Also please scope the MGTpower supplies continuously for sime time during testing . There could be some supply noise.  

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