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Engr_Shan
Visitor
Visitor
276 Views
Registered: ‎04-14-2021

XADC

Dear All, 
As my question is very basic, I am using XADC IP catalog in block design. after converting into wrapper my code is mentioned below, I am getting correct value, but I am not sure how can I use my values further in program, I want to control the led's with different values of Analog, Thanks.

module Apr_13_1_wrapper
(Vaux14_v_n,
Vaux14_v_p,
Vaux7_v_n,
Vaux7_v_p,
Vp_Vn_v_n,
Vp_Vn_v_p,
alarm_out,
ot_out);
input Vaux14_v_n;
input Vaux14_v_p;
input Vaux7_v_n;
input Vaux7_v_p;
input Vp_Vn_v_n;
input Vp_Vn_v_p;
output alarm_out;
output ot_out;

wire Vaux14_v_n;
wire Vaux14_v_p;
wire Vaux7_v_n;
wire Vaux7_v_p;
wire Vp_Vn_v_n;
wire Vp_Vn_v_p;
wire alarm_out;
wire ot_out;

Apr_13_1 Apr_13_1_i
(.Vaux14_v_n(Vaux14_v_n),
.Vaux14_v_p(Vaux14_v_p),
.Vaux7_v_n(Vaux7_v_n),
.Vaux7_v_p(Vaux7_v_p),
.Vp_Vn_v_n(Vp_Vn_v_n),
.Vp_Vn_v_p(Vp_Vn_v_p),
.alarm_out(alarm_out),
.ot_out(ot_out));



endmodule

 

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3 Replies
sandrao
Community Manager
Community Manager
219 Views
Registered: ‎08-08-2007

Hi @Engr_Shan 

I think you had an earlier similar question. In your XADC Wizard you will want to enable an interface to read the data internal to the FPGA. You can use the DRP interface and address the register addresses for Vaux7 and Aux14 found the UG : https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf

sandrao_0-1618572670968.png

 

Thanks,

Sandy


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Engr_Shan
Visitor
Visitor
195 Views
Registered: ‎04-14-2021

Hi @sandrao 

Thanks a lot for your answer, Yes actually it was the same question but here I wrote with focused problem, I am very new and beginner, I am getting the analog value which I can see by using oscilloscope, I want to control the some output against analog value, but I am not sure how can I use this value further in program? 

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sandrao
Community Manager
Community Manager
116 Views
Registered: ‎08-08-2007

Hi @Engr_Shan 

 

The DRP interface is what you want to use. If you select the DRP Interface you will see the ports on the Wizard.

There are details & examples in the UG on how to control the DRP interface : https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf

The DADDR are in given in that screenshot I sent previously eg Vaux14 = 1EH.

In the Example Design that is generated with your XADC Wizard you can simulate and see the DRP ports. The value in the DO is the reading of your Aux channel.

sandrao_0-1618829385653.png

 

Thanks,

Sandy


------------------------------------------------------------------------------------------------

Don’t forget to reply, kudo, and accept as solution.

If starting with Versal take a look at our Versal Design Process Hub , Versal Blogs and the Versal Useful Resources .

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