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Explorer
Explorer
252 Views
Registered: ‎10-28-2018

XAPP585 Reference design

Hi,

  I've downloaded the reference design of xapp585 and I was expecting to be getting output of R, G and B in D*7 bits in which D is the number of LVDS channels. In my case I have 4 LVDS channels so I was expecting to get 28 bits of R, G and B respectively. I am implemeting the top level example using the SDR. In the end, I managed to pass synthesis and implementation. However, in the end the schematic is as shown and I am not seeing the 28 bits of R, G and B output. Am I not understanding the design? Could somebody shed some light?


Thanks

Vivien

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Community Manager
Community Manager
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Registered: ‎08-08-2007

Re: XAPP585 Reference design

Hi @vivienwwp 

 

The Xapp585 does not sort the Video data into R, G and B. It simply does the clock to data alignment to enable the data capture and deserialization. You will need to take the 28bits out of the Xapp and format it into the R, G and B. 

 

Sandy 

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