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vinay_shenoy
Explorer
Explorer
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Registered: ‎08-31-2016

Xilinx Primitives : Migrating Spartan-6 to Artix -7

Hello,

I'm migrating a design compiled for spartan-6 devices (ISE based) to Artix 7 (Vivado based).

There are couple of Xilinx Primitives like LUT1,LUT4,FD,SRL16,PLL_BASE & BUFG used in the spartan-6 design. I was able to compile this design successfully in vivado for Artix 7 FPGA. But, I have concerns about its working. 

1) Are the xilinx primitive functions in spartan-6 and Artix-7 same?

2) Will there be any functional issues if I use the same spantan-6 primitives like LUT1,LUT4,SRL16,PLL_BASE in Artix 7 design?

Regards,

Vinay Shenoy

Vinay Shenoy
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2 Replies
anunesgu
Moderator
Moderator
830 Views
Registered: ‎02-09-2017

Hi @vinay_shenoy ,

Please take a look at the document 7 Series FPGAs Migration Methodology Guide - UG429, which shows all the compatible and not compatible primitives between the 6-series and 7-Series devices.

looking at page 19, it appears that LUT1, LUT4, and SRL16 are compatible. About the PLL, you might need to change it to PLLE2_BASE.

Thanks,

 

 

Andre Guerrero

Product Applications Engineer

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814 Views
Registered: ‎01-22-2015

Hi Vinay,

It is unusual to manually instantiate low-level primitives (like FD, LUT1, LUT4) in your HDL.  It is often better to replace the primitives with pure HDL – because this will:

  1. make your next device-migration easier (ie. pure HDL is more portable)
  2. give synthesis more freedom to optimize your design.

Cheers,
Mark